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ISTC2008 SYMPOSIUM AGENDA
Symposium A. Device and Reliability
Chairman: Dr. Cor Claeys, IMEC, Belgium
Co-Chairmen: Dr. Ru Huang, Peking University, China
Dr. Prashant Majhi, Sematech, USA
Committee Members: Dr. Waisum Wong, SMIC
Dr. Sunil Wickramanayaka, Anelva Corp., Japan
Dr. Albert Wang, Illinois Institute of Technology
Dr. Summer Tseng, SMIC
March 16
13:00-13:05 Chairman Address
  Cor Claeys, IMEC, Belgium
13:05-13:30 Strain Engineering for High Mobility Channels
  Morris (Ming-Dou) Ker, NCTU
13:30-13:55 Positive charges in Hf-based Dielectric Stacks
  Jianfu Zhang, Liverpool John Moores University
13:55-14:20 Stress simulation of embedded Si1-yCy Source/Drain nMOSFETs
  Cor Claeys, IMEC
14:20-14:45 CMOS scaling into next decade: Trends, Challenges and Opportunities
  Prashant Majhi, Sematech
14:45-15:10 A New Analytical Subthreshold Behavior Model for Asymmetrical Dual Material Double-Gate(ADMDG) MOSFET¨S
  T.K. Chiang, Southern Taiwan University
15:10-15:30 Coffee Break
15:30-15:50 High Voltage P-channel MOSFET for RF Applications
  Jinshu Zhang, Microsemi Corporation
15:50-16:10 Improving the Reliability of Metal-Insulator-Metal Capacitor (MIMC) by Integrating TiN only Bottom Plate in Mixed Signal Devices
  Jagdish Prasad, AMI Semiconductor
16:10-16:30 Characteristics FePt Magnetic Nano-Dot MOS Capacitor
  M. Murugesan, Japan Sci. Technol
16:30-16:50 The Effect of Post-Metallization Annealing on the Reliability of Copper Interconnects
  Jeff Gambino, IBM
16:50-17:05 Properties of Ballistic current in MOSFETs studied by RT model
  Yasuhiro Morozumi, Tokyo Institute of Technology
17:05-17:20 Origin of Frequency Dispersion in High-k Dielectrics
  Stephen Taylor, University of Liverpool
17:20-17:35 High-k materials and their response to X-ray radiation
  C. Z. Zhao, University of Liverpool
17:35-17:50 Investigation of STI Stress Impact from HDP Process on Device Performance
  MingYuan Liu, SMIC

March 17

08:00-08:15 Gate-all-around Cylindrical (GAAC) Transistor for Sub-10 Nanometer Scaling
  Deyuan Xiao, SMIC
08:15-08:30 Mechanism Study of Hot Carrier Induced Degradation in LDMOSFET
  Xinggong Wan, HHNEC
08:30-08:45 Charge to breakdown of ONO, the bottom thermal oxide and the top oxide in ONO for flash memory applications
  Feng Yan, SMIC
08:45-09:00 The Meaning and Method of EM Extrusion Monitor
  Wenyuan Wang, HHNEC
09:00-09:15 Dynamic Simulation of Void Formation and Evolution in Dual Damascene Copper Interconnect
  Dong Luo, Novellus
09:15-09:30 Simulation on the Effect of Halo Implantation Precision on the Performance of 36nm NMOSFET Device
  Jianwen Qi, Nissin Allis Ion Equipment
09:30-10:00 Coffee Break
10:00-10:15 Design, Modeling, and Fabrication of A Low IL and High Q SAW Delay Line
  Yigui Zhao, China Academy of Sciences
10:15-10:30 Case Study For Mushroom Defect Encountered At Passivation Module In X-FAB
  K. A. Mohammad, X-FAB Sarawak Sdn. Bhd.
10:30-10:45 Equivalent circuit analysis of V-SrZrO3 sputter-deposited thin films showing resistive switching
  C.H. Lai, National United University
10:45-11:00 Effect of Si/SiO2 Interface Properties and Trap Generation on Electrical Performance and TDDB Reliability for Ultrathin Oxide/Nitride Gate Dielectric Stacks
  Yimi Lee, National United University
11:00-11:15 Electromigration and Signal Integrity in Multilevel Interconnection
  Jianjun Wei, Northwest Polytechnical University
11:15-11:30 A New Self-Aligned BOI (Body-on-Insulator) FinFET Fabricated on Bulk Si Wafers
  Runsheng Wang, Peking University
11:30-11:45 Reliability enhancement in advanced MOSFETs using the U-shape STI structure for radiation application
  Yunpeng Pei, Peking University
11:45-12:00 A New Measurement Method on 1/f Noise of Wafer Level
  Lihua Huang, Peking University
     
 
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